Model {
  Name			  "PN_24_UL"
  Version		  6.5
  MdlSubVersion		  0
  GraphicalInterface {
    NumRootInports	    0
    NumRootOutports	    0
    ParameterArgumentNames  ""
    ComputedModelVersion    "1.19"
    NumModelReferences	    0
    NumTestPointedSignals   0
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  SavedCharacterEncoding  "windows-1256"
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  SampleTimeColors	  off
  LibraryLinkDisplay	  "none"
  WideLines		  off
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  ShowPortDataTypes	  off
  ShowLoopsOnError	  on
  IgnoreBidirectionalLines off
  ShowStorageClass	  off
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  SortedOrder		  off
  ExecutionContextIcon	  off
  ShowLinearizationAnnotations on
  ScopeRefreshTime	  0.035000
  OverrideScopeRefreshTime on
  DisableAllScopes	  off
  DataTypeOverride	  "UseLocalSettings"
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  MinMaxOverflowArchiveMode "Overwrite"
  BlockNameDataTip	  off
  BlockParametersDataTip  off
  BlockDescriptionStringDataTip	off
  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks off
  BrowserLookUnderMasks	  off
  Created		  "Sun Jul 01 15:36:03 2007"
  Creator		  "Welcome"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "Welcome"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Tue Jul 03 18:02:33 2007"
  ModelVersionFormat	  "1.%<AutoIncrement:19>"
  ConfigurationManager	  "None"
  LinearizationMsg	  "none"
  Profile		  off
  ParamWorkspaceSource	  "MATLABWorkspace"
  AccelSystemTargetFile	  "accel.tlc"
  AccelTemplateMakefile	  "accel_default_tmf"
  AccelMakeCommand	  "make_rtw"
  TryForcingSFcnDF	  off
  RecordCoverage	  off
  CovPath		  "/"
  CovSaveName		  "covdata"
  CovMetricSettings	  "dw"
  CovNameIncrementing	  off
  CovHtmlReporting	  on
  covSaveCumulativeToWorkspaceVar on
  CovSaveSingleToWorkspaceVar on
  CovCumulativeVarName	  "covCumulativeData"
  CovCumulativeReport	  off
  CovReportOnPause	  on
  ExtModeBatchMode	  off
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  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "normal"
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  ExtModeTrigHoldOff	  0
  ExtModeTrigDelay	  0
  ExtModeTrigDirection	  "rising"
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  ExtModeArchiveMode	  "off"
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  ExtModeIncDirWhenArm	  off
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  ExtModeWriteAllDataToWs off
  ExtModeArmWhenConnect	  on
  ExtModeSkipDownloadWhenConnect off
  ExtModeLogAll		  on
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  BufferReuse		  on
  ProdHWDeviceType	  "32-bit Generic"
  ShowModelReferenceBlockVersion off
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  Array {
    Type		    "Handle"
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    Simulink.ConfigSet {
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      Version		      "1.2.0"
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	Simulink.SolverCC {
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	  MaxConsecutiveZCs	  "1000"
	  ExtrapolationOrder	  4
	  NumberNewtonIterations  1
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	  AlgebraicLoopSolver	  "TrustRegion"
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	Simulink.DataIOCC {
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	    Cell		    "InitFltsAndDblsToZero"
	    Cell		    "OptimizeModelRefInitCode"
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	  WriteAfterReadMsg	  "UseLocalSettings"
	  AlgebraicLoopMsg	  "warning"
	  ArtificialAlgebraicLoopMsg "warning"
	  CheckSSInitialOutputMsg on
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	  CheckExecutionContextRuntimeOutputMsg	off
	  SignalResolutionControl "TryResolveAllWithWarning"
	  BlockPriorityViolationMsg "warning"
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	  InheritedTsInSrcMsg	  "warning"
	  DiscreteInheritContinuousMsg "warning"
	  MultiTaskDSMMsg	  "error"
	  MultiTaskCondExecSysMsg "error"
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	  TasksWithSamePriorityMsg "warning"
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	  CheckMatrixSingularityMsg "none"
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	  Int32ToFloatConvMsg	  "warning"
	  ParameterDowncastMsg	  "error"
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	  ParameterPrecisionLossMsg "warning"
	  UnderSpecifiedDataTypeMsg "none"
	  UnnecessaryDatatypeConvMsg "none"
	  VectorMatrixConversionMsg "none"
	  InvalidFcnCallConnMsg	  "error"
	  FcnCallInpInsideContextMsg "Use local settings"
	  SignalLabelMismatchMsg  "none"
	  UnconnectedInputMsg	  "warning"
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	  UnconnectedLineMsg	  "warning"
	  SFcnCompatibilityMsg	  "none"
	  UniqueDataStoreMsg	  "none"
	  BusObjectLabelMismatch  "warning"
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	  AssertControl		  "UseLocalSettings"
	  EnableOverflowDetection off
	  ModelReferenceIOMsg	  "none"
	  ModelReferenceVersionMismatchMessage "none"
	  ModelReferenceIOMismatchMessage "none"
	  ModelReferenceCSMismatchMessage "none"
	  ModelReferenceSimTargetVerbose off
	  UnknownTsInhSupMsg	  "warning"
	  ModelReferenceDataLoggingMessage "warning"
	  ModelReferenceSymbolNameMessage "warning"
	  ModelReferenceExtraNoncontSigs "error"
	  StrictBusMsg		  "Warning"
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	Simulink.HardwareCC {
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	  TargetShiftRightIntArith on
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	  TargetTypeEmulationWarnSuppressLevel 0
	  TargetPreprocMaxBitsSint 32
	  TargetPreprocMaxBitsUint 32
	  TargetHWDeviceType	  "Specified"
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	Simulink.ModelReferenceCC {
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	  UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
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	  ModelReferenceNumInstancesAllowed "Multi"
	  ModelReferencePassRootInputsByReference on
	  ModelReferenceMinAlgLoopOccurrences off
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	Simulink.RTWCC {
	  $BackupClass		  "Simulink.RTWCC"
	  $ObjectID		  8
	  Array {
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	    Cell		    "IncludeHyperlinkInReport"
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	  Version		  "1.2.0"
	  SystemTargetFile	  "grt.tlc"
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	  MakeCommand		  "make_rtw"
	  GenerateMakefile	  on
	  TemplateMakefile	  "grt_default_tmf"
	  GenerateReport	  off
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	  ProcessScriptMode	  "Default"
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	  ConfigAtBuild		  off
	  IncludeHyperlinkInReport off
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	  TargetLang		  "C"
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	  Array {
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	    Simulink.CodeAppCC {
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	      Array {
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		Dimension		16
		Cell			"IgnoreCustomStorageClasses"
		Cell			"InsertBlockDesc"
		Cell			"SFDataObjDesc"
		Cell			"SimulinkDataObjDesc"
		Cell			"DefineNamingRule"
		Cell			"SignalNamingRule"
		Cell			"ParamNamingRule"
		Cell			"InlinedPrmAccess"
		Cell			"CustomSymbolStr"
		Cell			"CustomSymbolStrGlobalVar"
		Cell			"CustomSymbolStrType"
		Cell			"CustomSymbolStrField"
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		Cell			"CustomSymbolStrBlkIO"
		Cell			"CustomSymbolStrTmpVar"
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	      Version		      "1.2.0"
	      ForceParamTrailComments off
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	      PrefixModelToSubsysFcnNames on
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	      CustomSymbolStrGlobalVar "$R$N$M"
	      CustomSymbolStrType     "$N$R$M"
	      CustomSymbolStrField    "$N$M"
	      CustomSymbolStrFcn      "$R$N$M$F"
	      CustomSymbolStrBlkIO    "rtb_$N$M"
	      CustomSymbolStrTmpVar   "$N$M"
	      CustomSymbolStrMacro    "$R$N$M"
	      DefineNamingRule	      "None"
	      ParamNamingRule	      "None"
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	      InsertBlockDesc	      off
	      SimulinkBlockComments   on
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	      InlinedPrmAccess	      "Literals"
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	    Simulink.GRTTargetCC {
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	      Array {
		Type			"Cell"
		Dimension		13
		Cell			"IncludeMdlTerminateFcn"
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		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"GenerateTestInterfaces"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportNonFinite"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		PropName		"DisabledProps"
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	      Version		      "1.2.0"
	      TargetFcnLib	      "ansi_tfl_tmw.mat"
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	      GenFloatMathFcnCalls    "ANSI_C"
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	      IsPILTarget	      off
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	    PropName		    "Components"
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	hdlcoderui.hdlcc {
	  $ObjectID		  11
	  Description		  "HDL Coder custom configuration component"
	  Version		  "1.2.0"
	  Name			  "HDL Coder"
	  Array {
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	    Dimension		    1
	    Cell		    ""
	    PropName		    "HDLConfigFile"
	  }
	  HDLCActiveTab		  "0"
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	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      CurrentDlgPage	      "Solver"
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    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
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  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
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    NamePlacement	    "normal"
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
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  BlockParameterDefaults {
    Block {
      BlockType		      Constant
    }
    Block {
      BlockType		      Logic
      Operator		      "AND"
      Inputs		      "2"
      IconShape		      "rectangular"
      AllPortsSameDT	      on
      OutDataTypeMode	      "Logical (see Configuration Parameters: Optimiza"
"tion)"
      LogicDataType	      "uint(8)"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Product
      Inputs		      "2"
      Multiplication	      "Element-wise(.*)"
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      OutScaling	      "2^0"
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      RndMeth		      "Zero"
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      SampleTime	      "-1"
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    Block {
      BlockType		      Scope
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      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
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      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
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    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      SignalGenerator
      WaveForm		      "sine"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Frequency		      "1"
      Units		      "Hertz"
      VectorParams1D	      on
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    Block {
      BlockType		      Sum
      IconShape		      "rectangular"
      Inputs		      "++"
      InputSameDT	      on
      OutDataTypeMode	      "Same as first input"
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      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Switch
      Criteria		      "u2 >= Threshold"
      Threshold		      "0"
      InputSameDT	      on
      OutDataTypeMode	      "Inherit via internal rule"
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      ZeroCross		      on
      SampleTime	      "-1"
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  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
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  LineDefaults {
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    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
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  System {
    Name		    "PN_24_UL"
    Location		    [2, 70, 1006, 695]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      " Delay"
      Ports		      [1, 1]
      Position		      [760, 568, 795, 602]
      Orientation	      "left"
      BackgroundColor	      "magenta"
      NamePlacement	      "alternate"
      SourceBlock	      "simulink/Discrete/Integer Delay"
      SourceType	      "Integer Delay"
      vinit		      "1"
      samptime		      "1"
      NumDelays		      "16+(2^24)"
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    Block {
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      Position		      [700, 373, 735, 407]
      BackgroundColor	      "cyan"
      NamePlacement	      "alternate"
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      vinit		      "1"
      samptime		      "1"
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      BlockType		      Reference
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      Position		      [110, 373, 145, 407]
      BackgroundColor	      "cyan"
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      BlockType		      Reference
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      Ports		      [1, 1]
      Position		      [825, 303, 860, 337]
      BackgroundColor	      "cyan"
      NamePlacement	      "alternate"
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      Position		      [765, 303, 800, 337]
      BackgroundColor	      "cyan"
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      Position		      [700, 303, 735, 337]
      BackgroundColor	      "cyan"
      NamePlacement	      "alternate"
      SourceBlock	      "simulink/Discrete/Integer Delay"
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    Block {
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      Position		      [635, 303, 670, 337]
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    Block {
      BlockType		      Reference
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      Position		      [570, 303, 605, 337]
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    Block {
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    }
    Line {
      SrcBlock		      " Delay20"
      SrcPort		      1
      DstBlock		      " Delay19"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay22"
      SrcPort		      1
      DstBlock		      " Delay21"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay24"
      SrcPort		      1
      DstBlock		      " Delay23"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay13"
      SrcPort		      1
      DstBlock		      " Delay12"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 17"
      SrcPort		      1
      DstBlock		      " Delay 16"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 15"
      SrcPort		      1
      DstBlock		      " Delay 14"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 16"
      SrcPort		      1
      DstBlock		      " Delay 15"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay 11"
      SrcPort		      1
      DstBlock		      " Delay 10"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 14"
      SrcPort		      1
      DstBlock		      " Delay 13"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 5"
      SrcPort		      1
      DstBlock		      " Delay 4"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 4"
      SrcPort		      1
      DstBlock		      " Delay 3"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 3"
      SrcPort		      1
      Points		      [5, 0]
      Branch {
	DstBlock		"Delay 2"
	DstPort			1
      }
      Branch {
	Points			[0, 35]
	DstBlock		"Logical\nOperator4"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      " Delay 1"
      SrcPort		      1
      Points		      [5, 0]
      Branch {
	DstBlock		"Delay 0"
	DstPort			1
      }
      Branch {
	Points			[0, 55]
	DstBlock		"Logical\nOperator4"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "Delay 2"
      SrcPort		      1
      Points		      [5, 0]
      Branch {
	DstBlock		" Delay 1"
	DstPort			1
      }
      Branch {
	Points			[0, 45]
	DstBlock		"Logical\nOperator4"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      " Delay 10"
      SrcPort		      1
      DstBlock		      " Delay 9"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 6"
      SrcPort		      1
      DstBlock		      " Delay 5"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 7"
      SrcPort		      1
      DstBlock		      " Delay 6"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 8"
      SrcPort		      1
      DstBlock		      " Delay 7"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 19"
      SrcPort		      1
      DstBlock		      " Delay 18"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 21"
      SrcPort		      1
      DstBlock		      " Delay 20"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 23"
      SrcPort		      1
      DstBlock		      " Delay 22"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 9"
      SrcPort		      1
      DstBlock		      " Delay 8"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 18"
      SrcPort		      1
      DstBlock		      " Delay 17"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 20"
      SrcPort		      1
      DstBlock		      " Delay 19"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 22"
      SrcPort		      1
      DstBlock		      " Delay 21"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 24"
      SrcPort		      1
      DstBlock		      " Delay 23"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 13"
      SrcPort		      1
      DstBlock		      " Delay 12"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay0"
      SrcPort		      1
      Points		      [5, 0]
      Branch {
	Points			[0, 55]
	DstBlock		"Logical\nOperator2"
	DstPort			2
      }
      Branch {
	Points			[78, 0; 0, 65]
	DstBlock		"Logical\nOperator3"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Logical\nOperator2"
      SrcPort		      1
      Points		      [-25, 0; 0, -120]
      DstBlock		      " Delay24"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay12"
      SrcPort		      1
      Points		      [0, 35; -840, 0]
      DstBlock		      "Delay11"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay 12"
      SrcPort		      1
      Points		      [0, 35; -840, 0]
      DstBlock		      "Delay 11"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Logical\nOperator4"
      SrcPort		      1
      Points		      [-20, 0; 0, -120]
      DstBlock		      " Delay 24"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay 0"
      SrcPort		      1
      Points		      [5, 0]
      Branch {
	Points			[0, 65]
	DstBlock		"Logical\nOperator4"
	DstPort			4
      }
      Branch {
	Points			[80, 0; 0, -160]
	DstBlock		"Logical\nOperator3"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Constant"
      SrcPort		      1
      Points		      [0, 20]
      DstBlock		      "Switch"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Constant1"
      SrcPort		      1
      Points		      [0, -20]
      DstBlock		      "Switch"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Logical\nOperator3"
      SrcPort		      1
      Points		      [35, 0; 0, 265]
      DstBlock		      "Switch"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Switch"
      SrcPort		      1
      Points		      [-25, 0]
      Branch {
	Points			[0, 95]
	DstBlock		" Delay"
	DstPort			1
      }
      Branch {
	DstBlock		"Add"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Add"
      SrcPort		      1
      Points		      [-75, 0]
      DstBlock		      "Scope"
      DstPort		      1
    }
    Line {
      SrcBlock		      " Delay"
      SrcPort		      1
      Points		      [-30, 0]
      DstBlock		      "Product"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Signal\nGenerator"
      SrcPort		      1
      Points		      [25, 0]
      DstBlock		      "Product"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Product"
      SrcPort		      1
      Points		      [0, -15]
      DstBlock		      "Add"
      DstPort		      2
    }
  }
}

# Finite State Machines
#
#    Stateflow Version 6.5 (R2006b) dated Aug  8 2006, 21:09:58
#
#

Stateflow {

	machine {
		id                   		1
		name                 		"PN_24_UL"
		created              		"03-Jul-2007 14:38:28"
		isLibrary            		0
		firstTarget          		2
		sfVersion            		65014000
	}

	target {
		id                        		2
		name                      		"sfun"
		description               		"Default Simulink S-Function Target."
		machine                   		1
		linkNode                  		[1 0 0]
	}
}
