APS-X84 VHDL/FPGA SYNTHESIS TUTORIAL

LAB 1
THE VHDL TO FPGA PROCESS
The process of getting VHDL code into the FPGA involves the following steps:

1) EDITING the VHDL code
2) COMPILING THE CODE
3) ROUTING THE COMPLETED DESIGN
4) DOWNLOADING THE ROUTED BIT IMAGE INTO THE FPGA
5) SIMULATING OR CONTROLLING THE FPGA (USING THE FPGA DESIGN)

We will be using the APS-X84-FSV/FBV kits from APS which include the XILINX Foundation VHDL compiler and XACT Router and the APS-X84 FPGA test board to demonstrate this process.

VHDL CODING

The first step which we have already completed involves the actual writing of VHDL code with a text editor. The Foundation software in the APS-X84-FSV/FBV kits includes a VHDL context sensitive text editor. First bring up the Foundation Software and Click on File, Open,
and select the X84Lab1 project.

Then Double chick on the X84Lab1.vhd file

This will bring up the VHDL EDITOR with the file which is essentially the file we have been examining.

Notice the color context highlighting. This is very useful. If we make a mistake for instance on the comment line:

-- Begin Entity (This is a comment)

We can see that the context highlights colors change, thus quickly telling us something is wrong.

To compile the design select SYNTHESIS and then Synthesize. If you haven't changed anything the compiler will synthesize correctly and sow the following message box.

At this point we have a synthesized design. We now have to fit the design into the chip using the XACT router. Doulble click on the XACT button in the middle of the Foundation window.

This will bring up the design editor screen shown below.

Select DESIGN and then TRANSLATE and you will get the following DIALOG BOX

Press OK and the design will translate and you should get the following message

Then press OK and select DESIGN and then IMPLEMENT and you will see this screen

We need to set one option at this point so press the EDIT CONFIGURATION button next to Configuration. Insure that :

Produce ASCII Configuration File is checked.

Press OK to get back to the Design Dialog Box:

Then press RUN and the router will begin routing your new design. While running the different phases of the IMPLEMENTATION PROCESS ARE DISPLAYED:

At the end of the route you will get the following message:

CONGRATULATIONS you have just completed your first design. The end result is a bit file called X84LAB1.rbt

This file will be found in the following directory:

c:\active\projects\x84LAB1\xproject\v1_2\x84Lab1.rbt

The path may vary depending on the project name used (xproject) and the version of the route (x1_2). This .rbt file needs o be in the directory with the X84 C executables which you use or compile. Any new modified images need to also be copied into the executable directory so the program can find them.

The X84 board will be used inside the PC for this example and the RBT file will be loaded directly into the FPGA via the PC ISA bus. The used only need have the X84 in one of the PC slots set to the address of the C code executable (0x304 is the default) which can be modified to accommodate different addresses in the PC. (See the APS-X84 FPGA Test Card USER's Guide).

The .rbt file will now be downloaded into our X84 FPGA board using the provided X84Lab1.Cpp / X84Lab1.exe DOS files which comes with the X84 kits. The source code is included and a detailed description of the download process is shown with references to the X84 schematics and the C source code. We will not delve into the particulars of the C code here but will instead download the file using the program X84Lab1C.exe. The program can automatically detect from the .rbt file which type FPGA has been routed (ie 4005 , 4010, 5202,......etc.) The file is then downloaded and a control screen comes up on the PC as follows:

As can be seen the two inputs can be set to a one or zero, and the X84 utility LED will respond accordingly.

That's all there is to it. It may seem to be alot to do for an AND gate implementation, but the same process is used to produce extremely complex designs.